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Bare metal, Assembly language • Re: How would one go about linking two or more RP2040 chips together?

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I believe it would, providing USB, VBUS, VSYS are never powered, all Pico are powered via the 3V3 OUT being used as input.

In my experience regulators will tolerate being unpowered with voltage applied to their Vout but I have not tried it with a Pico. Whether things would be better with VSYS and/or 3V3EN tied to 0V/GND I don't know. Depending on current draw it may be possible for one Pico with USB connected to power all the rest. It really needs someone willing to try it with some sacrificial Pico.
Was initially thinking about connecting the 5V (VBUS?) so each Pico will make its own 3.3 from common 5V. However that might not be the best when gpios are shared between multiple boards. Imagine SPI display connected to hardware SPI (of all boards) then each Pico computing one line of Mandelbrot set and sending it over same SPI (while first locking/negotiating it so others would not interfere). For this powering from common 3.3V would be better - to not have slightly different 3.3V voltage. Maybe even for that common PIO based parallel data bus it would be better. BTW, There are enough gpios to have 16bit data/address bus and still have enough for external shared spi and uart (or some separate 4-8 bit address bus). Maybe the bus width could be even dynamic so multiple subsets of boards can allocate their own. I imagine with some OS made around this it could be used for various use cases with different topologies - like e.g. emulators - each board running one or two tasks emulating different chips sitting on one big common bus or several small ones.
It would however require each board to determine how to set its outputs according to Unique ID. Or the software loaded, but that's more error prone. Using Unique ID means one board alone knows it's a master even with the same code in each. And each knows which it is and which pins to use for external communications. Providing each configure correctly it then doesn't matter in which order or where they are in the stack.
Yes preflashing some initial software before adding it to the stack would be enough, that could indeed also generate some unique ID (if the chip does not already have one, at least the SPI flash has one?). However organizing who is the master could be done just by random delay after power on. Or pressing a button on the top one.

Statistics: Posted by fanoush — Fri May 10, 2024 8:20 am



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